During operation of integrated circuits with junction isolation, abnormal bias conditions may occur. Abnormal bias conditions include determination of undesired currents to the substrate and/or into active regions. These regions contain the integrated structure of the circuit components, and normally should remain isolated among each other and from the substrate by way of reverse biased p/n junctions. These abnormal bias conditions commonly occur when switching is performed for driving inductive loads, such as inductors and electric motor windings, through output transistors of the integrated circuit operating as electronic switches.
FIG. 1 shows a typical switching circuit formed with DMOS power transistors. When both transistors H and L are not conducting while a current is still flowing in the inductive load, the inductive load causes the discharge current to recirculate. This recirculation may be through the body-drain diode DBH or DBL of the transistor H or of the transistor L, depending on the direction of the discharge current. When the inductive discharge current flows through the diode DBH of the integrated transistor, a pnp parasitic transistor is conducting. The diode DBH represents the base-emitter junction, and the collector is represented by the substrate of the chip, as schematically depicted in FIG. 2. Consequently, a portion of the current is injected in the substrate. This phenomenon is commonly referred to as an oversupply, because the voltage of node A exceeds the supply VCC to allow diode DBH to conduct.
For a correct functioning of an integrated circuit with junction isolation formed either in well regions or in an n-type epitaxial layer on a p substrate, it is necessary that the substrate be biased at the lowest voltage. For example, the substrate may be biased to ground potential using surface pads or through the rear surface of the device. However, these contacts have a finite resistance and as a consequence, a current injected in the substrate may cause an increase of the substrate voltage. This phenomenon is further accentuated in proximity of the component through which the above described current recirculation occurs. Its intensity drops as the physical distance from the component increases. Therefore, there may be momentary increases of the substrate potential in the vicinity of the transistors L or H with respect to the current recirculation. The components located in the zone affected by these increments of the substrate potential may malfunction, or even undergo a breakdown condition.
When the recirculation current flows through the diode DBL, it will be divided. One portion will flow through the diode DBL itself, and the other portion will flow through the junction drain/substrate DSUB, as depicted in FIG. 3. This diode DSUB, through which part of the current flows, represents the base-emitter junction of a multicollector parasitic npn transistor, NPN par, for which any n well region or n epitaxial region on the substrate may form a collector. During this type of recirculation, referred to as belowground because the node A assumes a negative voltage, part of the recirculation current is pulled from each one of the multicollectors (n regions). The efficiency of a pulling current will be highest for the collector region closer to the area of the DMOS transistor effected by the recirculation current. This efficiency drops as the distances become increasingly larger from the device.
Known techniques for preventing the belowground effects, e.g., leaving the substrate floating, tend to worsen the effects of an oversupply phenomenon and viceversa, e.g., by ensuring a good connection to ground of the substrate. Therefore, depending on the situation, it is a common practice to provide an approach to safeguard against this phenomenon.